Cornell University, Ithaca, NY, USA
Ph.D. in Electrical and Computer Engineering (August 2014)
Korea University, Seoul, Rep. of Korea
B.S. summa cum laude in Electrical and Computer Engineering (March 2001 – February 2005)
- Senior Research Scientist, Center for BioMicrosystems, Brain Science Institute, Korea Institute of Science and Technology (KIST) (Jan 2018 – Present)
- Postdoc Research Associate, Electrical and Engineering, Columbia University, New York, NY, USA (Sept 2015 – Jan 2018)
- Postdoc Research Associate, Electrical and Computer Engineering, Cornell University, Ithaca, NY, USA (Sept 2014 – Aug 2015)
- Research Assistant, Electrical and Computer Engineering, Cornell University, Ithaca, NY, USA (August 2008 – August 2014)
- Integrated Neural Interface
– Optoelectronic Neural Interface
• Lens-free Implantable Fluorescence Imaging Device
• Custom CIS (SPAD, APD) IC for Light-field Imaging
• μLED and SPAD array on CMOS for in-vivo Fluorescence Imaging on Awake or Freely
- Behaving Animal
• Low-power Wireless Data and Power Connectivity for IMD
– Mixed signal IC design for Low Power IMD
M.S. Electrical Engineering, Department of Electronics, The National Technical University of Ukraine “Igor Sikorsky Kyiv Polytechnic Institute”, Ukraine (2017)
B.S. Electrical Engineering, Department of Electronics, The National Technical University of Ukraine “Igor Sikorsky Kyiv Polytechnic Institute”, Ukraine (2015)
- Mixed signal circuit design
- Brain-computer interface
B.S. Electronics and Electrical Engineering, Department of Engineering, Dongguk University (2018)
- Biomedical application of Analog/Mixed signal IC design
B.S. Electronic Engineering, Department of EE, Kookmin University (2018)
- Bio/Medical application Analog/Mixed signal IC design
A 72×60, angle-sensitive single photon avalanche diode (A-SPAD) array for lens-less 3D fluorescence lifetime imaging. An A-SPAD pixel consists of a SPAD to provide precise photon arrival time where a time-resolved operation is utilized to avoid stimulus-induced saturation, and integrated diffraction gratings on top of the SPAD to extract incident angles of the incoming light. The combination enables mapping of fluorescent sources with different lifetimes in 3D space down to micrometer scale. Futhermore, the chip presented herein integrates pixel-level counters to reduce output data-rate and to enable a precise timing control.
An inductively powered, orthogonal current-reuse multi-channel amplifier for power-efficient neural recording. The power rectifier uses the input swing as a self-synchronous charge pump, making it a fully passive, full-wave ladder rectifier.
A CMOS image sensor for efficient capture of polar symmetric imaging targets. The array uses circular photodiodes, arranged in concentric rings to capture, for example, diffraction patterns generated by optically probing a revolving MEMS device. The chip is designed with a vacant, central spot to facilitate the easy single-axis alignment of the probing illumination, target device, and detector. Imaging of high-speed rotation (>1 kfps) is made possible by dividing the array into multiple concentric bands with sectorwise addressing control.
An all digital low-power CMOS edge detection image sensors array. Each pixel contains a voltage-controlled ring oscillator to achieve low power and cost efficient digital only edge detection. While conventional edge detection methods require high computing power as well as large chip area to process intensity maps, this work implements all-digital parallel processing algorithm that detects differences between neighboring pixel pairs on-chip, hence reducing the aforementioned power and cost overheads. In particular, a simple columnshared frequency comparator enables low power operation by eliminating arithmetic computations with large memory requirement. Such simple edge detection algorithm allows the processor area to be less than 16% of the entire image sensor, therefore maximizing the proportion of active optical area.
Although there is much active research on softwaredefined radios (SDRs) with receive (RX) or transmit (TX) functionality, little work has been done on SDR transceivers supporting frequency division duplex (FDD). In this paper, we present a new circuit concept in which a distributed TX circuit cancels the transmitted signal at a reverse RX port through destructive interference while adding signal constructively at a forward TX port. We pair the distributed transmitter with a receiver-tracking PA degeneration technique to suppress the injected noise from TX circuits in the RX band. The system does not require off-chip filters or circulators, but still achieves both SDR flexibility and both FDD and time division duplex function. Measurements from the transceiver implemented in 65-nm CMOS show a frequency tuning range of 0.3–1.6 GHz with TX–RX isolation >23 dB and transmitted power up to 19 dBm.
-  H Yüksel, D Yang, Z Boynton, C Lee, T Tapen, A Molnar, A Apsel (2017). A wideband fully integrated software-defined transceiver for FDD and TDD operation. IEEE Journal of Solid-State Circuits 52 (5), 1274-1285.
-  C Lee, B Johnson, T Jung, A Molnar (2016). A 72 × 60 Angle-Sensitive SPAD Imaging Array for Lens-less FLIM. Sensors 16 (9), 1422.
-  Dong Yang, Hazal Yüksel, Christopher Newman, Changhyuk Lee, Zachariah Boynton, Noman Paya, Miles Pedrone, Alyssa Apsel, Alyosha Molnar (2016). A fully integrated software-defined FDD transceiver tunable from 0.3-to-1.6 GHz. Radio Frequency Integrated Circuits Symposium (RFIC), 2016 IEEE.
-  J Hone, A Molnar, C Lee, SW Lee (2016). Graphene resonator based mixer-first receiver on CMOS for digitally controlled and widely tunable RF interface. US Patent 9,344,127
-  S Sivaramakrishnan, C Lee, B Johnson, A Molnar (2016). A Polar Symmetric CMOS Image Sensor for Rotation Invariant Measurement. IEEE Sensors Journal 16 (5), 1190-1199.
-  C Lee, W Chao, S Lee, J Hone, A Molnar, SH Hong (2015). A low-power edge detection image sensor based on parallel digital pulse computation. IEEE Transactions on Circuits and Systems II: Express Briefs 62 (11), 1043-1047.
-  C Lee, B Johnson, A Molnar (2015). Angle sensitive single photon avalanche diode. Applied Physics Letters 106 (23), 231105.
-  C Lee, B Johnson, A Molnar (2014). An on-chip 72× 60 angle-sensitive single photon image sensor array for lens-less time-resolved 3-D fluorescence lifetime imaging. VLSI Circuits Digest of Technical Papers, 2014 Symposium on, 1-2.
-  V Vinogradov, J Ha, C Lee, A Molnar, SH Hong (2014). Dynamic ternary CAM for hardware search engine. Electronics Letters 50 (4), 256-258.
-  B Johnson, C Lee, S Sivaramakrishnan, A Molnar (2013). A high-speed polar-symmetric imager for real-time calibration of rotational inertial sensors. SENSORS, 2013 IEEE, 1-4.
-  C Lee, B Johnson, A Molnar (2013). A sub-threshold voltage ladder rectifier for orthogonal current-reuse neural amplifier. Biomedical Circuits and Systems Conference (BioCAS), 2013 IEEE, 358-361.
-  C Andrews, C Lee, A Molnar (2012). Effects of LO harmonics and overlap shunting on N-phase passive mixer based receivers. ESSCIRC (ESSCIRC), 2012 Proceedings of the, 117-120.
-  PR Gill, C Lee, S Sivaramakrishnan, A Molnar (2012). Robustness of planar Fourier capture arrays to colour changes and lost pixels. Journal of Instrumentation 7 (01), C01061.
-  PR Gill, C Lee, DG Lee, A Wang, A Molnar (2011). A microscale camera using direct Fourier-domain scene capture. Optics letters 36 (15), 2949-2951.
-  C Lee, A Molnar (2011). Self-quenching, Forward-bias-reset for Single Photon Avalanche Detectors in 1.8 V, 0.18 µm process. Circuits and Systems (ISCAS), 2011 IEEE International Symposium on, 2217-2220.
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